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available si91821 vishay siliconix document number: 71614 s-51147?rev. e, 20-jun-05 www.vishay.com 1 micropower 300-ma cmos ldo regulator with error flag features input voltage: 2.35 ? 6.0 v fixed 1.8-v, 2.5-v, 2.8-v, 3.0-v, 3.3-v, 5.0-v, or adjustable output voltage options low 120-mv dropout at 300-ma load guaranteed 300-ma output current 500-ma peak output current capability uses low esr ceramic output capacitor fast load and line transient response only 100- v(rms) noise with noise bypass capacitor 1- a maximum shutdown current built-in short circuit and thermal protection out-of-regulation error flag (power_good) applications cellular phones laptop and palm computers pda, digital still cameras description the si91821 is a 300-ma cmos ldo (low dropout) voltage regulator. the device features ultra low ground current and dropout voltage to prolong battery life in portable electronics. the si91821 offers line and lo ad transient res ponse and ripple rejection superior to that of bipolar or bicmos ldo regulators. the device is designed to maintain regulation while delivering 500-ma peak current. this is useful for systems that have high surge current upon turn-on. the si91821 is designed to drive the lower cost ceramic, as well as tantalum, output capacitors. the device is guaranteed stable from maximum load current down to 0-ma load. in addition, an external noise bypass capacitor connected to the device?s c noise pin will lower the ldo?s output noise for low noise applications. the si91821 also includes an out-of-regulation error flag. when the output voltage is 5% below its nominal output voltage, the error flag outp ut goes low. the si91821 is available in both standard and lead (pb)-free msop-8 packages and is specified to operate over the industrial temperature range of ? 40 c to 85 c. typical applications circuits figure 3. fixed output, low noise, full features application c noise sd 78 error 21, 4 gnd set 65 v in v out 3 gnd v in 2.2 f si91821 on/off 2.2 f v out power_good 1 m 0.033 f figure 1. fixed output figure 2.. adjustable output v out c noise sd 78 error 2 1, 4 gnd set 65 v in v out 3 gnd v in 2.2 f si91821 2.2 f optional v out c noise sd 78 error 2 1, 4 gnd set 65 v in v out 3 gnd v in 2.2 f si91821 2.2 f
si91821 vishay siliconix www.vishay.com 2 document number: 71614 s-51147?rev. e, 20-jun-05 absolute maximum ratings input v oltage, v in 6.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sd input voltage, v sd ? 0.3 v to v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output current, i out short circuit protected . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage, v out ? 0.3 v to v o(nom) + 0.3 v . . . . . . . . . . . . . . . . . . . . . . . . maximum junction temperature, t j(max) 150 c . . . . . . . . . . . . . . . . . . . . . . . storage temperature, t stg ? 55 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . esd (human body model) 2 kv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation (package) a 8-pin msop b 666 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . thermal impedance ( ja ) a 8-pin msop b 185 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes a. device mounted with all leads soldered or welded to pc board. b. derate 10 mw/ c above t a = 25 c stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratin gs only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. recommended operating range input v oltage, v in 2.35 v to 6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage, v out 1.5 to 5.0 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sd input voltage, v sd 0 v to v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i out 0 to 300 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating ambient temperature, t a ? 40 c to 85 c . . . . . . . . . . . . . . . . . . . . operating junction temperature, t j ? 40 c to 125 c . . . . . . . . . . . . . . . . . . . c in = 2.2 f, c out = 2.2 f (ceramic, x5r or x7r type) , c noise = 0.033 f (ceramic) c out range = 1 f to 10 f ( 10%, x5r or x7r type) c in c out specifications test conditions unless otherwise specified v v 1 v i 1 a limits ? 40 to 85 c parameter symbol v in = v out(nom) + 1 v, i out = 1 ma c in = 2.2 f, c out = 2.2 f, v sd = 1.5 v temp a min b typ c max b unit input v oltage v in 2.35 6.0 v output voltage v out adjustable v ersion full 1.5 5.0 v out p ut volta g e accurac y v out 1 ma i out 300 ma room ? 1.5 1.5 % output voltage accuracy (to stated output voltage) v out 1 ma i out 300 ma full ? 2.5 2.5 % v out(nom) feedback voltage (adj version) v set room 1.191 1.215 1.239 v feedback voltage (adj version) v set full 1.179 1.251 v line regulation (except 5-v version) v 100 from v in = v out(nom) + 1 v to v out(nom) + 2 v full ? 0.18 0.18 line regulation (5-v v ersion) v out 100 v v from v in = 5.5 v to 6 v full ? 0.18 0.18 %/v line regulation (adj version) v in v out(nom) v out = 1.5 v from v in = 2.5 v to 3.5 v full ? 0.18 0.18 %/v line regulation (adj version) v out = 5 v from v in = 5.5 v to 6 v full ? 0.18 0.18 i out = 10 ma room 5 20 dropout voltage d v in ? v out i out = 200 ma full 80 135 mv pg in out i out = 300 ma full 120 200 i out = 0 ma full 150 270 ground pin current i gnd i out = 200 ma room 500 a gnd i out = 300 ma room 600 a shutdown supply current i in(off) v sd = 0 v room 0.1 1 peak output current i o(peak) v out 0.95 x v out(nom) , t pw = 2 ms room 500 ma bw = 10 hz to 100 khz w/o c noise room 260 out p ut noise volta g e e n bw = 10 hz to 100 khz i out = 150 ma c noise = 0.1 f room 37 v ( rms ) output noise voltage e n bw = 10 to 100 khz i out = 10 ma c noise = 33 nf room 54 v (rms) f = 1 khz room 60 ripple rejection v out / v in i out = 150 ma f = 10 khz room 50 db pp j out in out f = 100 khz room 40
si91821 vishay siliconix document number: 71614 s-51147?rev. e, 20-jun-05 www.vishay.com 3 specifications limits ? 40 to 85 c test conditions unless otherwise specified v in = v out(nom) + 1 v, i out = 1 ma c in = 2.2 f, c out = 2.2 f, v sd = 1.5 v parameter unit max b typ c min b temp a test conditions unless otherwise specified v in = v out(nom) + 1 v, i out = 1 ma c in = 2.2 f, c out = 2.2 f, v sd = 1.5 v symbol dynamic line regulation v o(line) v in : v out(nom) + 1 v to v out(nom) + 2 v t r /t f = 5 s, i out = 250 ma room 10 mv dynamic load regulation v o(load) i out : 1 ma to 150 ma, t r /t f = 2 s room 30 mv turn-on overshoot v oos v in followed by sd = high event c noise 100 nf room 2.5 % v out turn-on-time t on c out = 10 f, v out to 90% of final value, v in = 3.6 v room 350 s thermal shutdown thermal shutdown junction temp t j(s/d) room 165 c thermal hysteresis t hyst room 20 c short circuit current i sc v out = 0 v room 800 ma shutdown input sd input voltage v ih high = regulator on (rising) full 1.5 v in v sd input voltage v il low = regulator off (falling) full 0.4 v sd input current e i ih v sd = 0 v, regulator off room 0.01 a sd input current e i il v sd = 6 v, regulator on room 1.0 a shutdown hysteresis v hyst full 100 mv error output output high leakage i off error = v out(nom) full 0.01 2 a output low voltage v ol i sink = 2 ma full 0.4 power_good trip threshold f, g (rising) v th full 0.93 x v out 0.95 x v out 0.97 x v out v hysteresis f v hyst room 2% x v out error delay t delay c noise 100 nf full 10 s notes a. room = 25 c, full = ? 40 to 85 c. b. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. typical values are for design aid only, not guaranteed nor subject to production testing and are measured at t a = 25 c. d. the dropout voltage is defined as v in ? v out when v out is 100 mv below the value of v out for v in = v out + 2 v. this is applicable for voltages of 2.5 v or higher. e. the device?s shutdown pin includes a typical 6-m internal pull-down resistor connected to ground. f. v out is defined as the output voltage of the dut at 1 ma. g. typical only, from v out = 2.0 v to v out = 1.5 v.
si91821 vishay siliconix www.vishay.com 4 document number: 71614 s-51147?rev. e, 20-jun-05 timing waveforms sd v out error figure 4. timing diagram for power-up t on t delay v nom = 0.95 v nom t delay v ih v il pin configuration v out error gnd c noise v out set msop-8 top view v in sd 1 2 3 4 8 7 6 5 pin description pin number name function 1, 4 v out output voltage. connect c out between this pin and ground. 2 v in input supply pin. bypass this pin with a 2.2- f ceramic or tantalum capacitor to ground. 3 gnd ground pin. local ground for c noise and c out . 5 set for fixed output voltage versions, this pin could be connected to gnd. for adjustable output voltage version, this voltage feedback pin sets the output voltage via an external resistor divider. 6 c noise noise bypass pin. for low noise applications, a 0.01- f or larger ceramic capacitor should be connected from this pin to ground. 7 sd by applying less than 0.4 v to this pin, the device will be turned off. connect this pin to v in if unused. 8 error this open drain output is an error flag output which goes low when v out drops 5% below its nominal voltage.
si91821 vishay siliconix document number: 71614 s-51147?rev. e, 20-jun-05 www.vishay.com 5 block diagram ? + c in 2.2 f v in 2 5 sd 7 on off 3 gnd rfb2 rfb1 set ? + + 1.215 v v ref ? 6c noise ? + + 2 a to v in 1, 4 c out 2.2 f 8 r ext v out error figure 5. 300-ma cmos ldo regulator 6 m 60 mv switches shown for device in normal operating mode (sd = high) ? + c in 2.2 f v in 2 5 sd 7 on off 3 gnd set ? + + 1.215 v v ref ? 6c noise ? + + 2 a to v in 1, 4 c out 2.2 f 8 r ext v out error figure 6. 300-ma cmos ldo regulator (adjustable output) 6 m 60 mv r 1 r 2 v set
si91821 vishay siliconix www.vishay.com 6 document number: 71614 s-51147?rev. e, 20-jun-05 detailed description the si91821 is a low drop out, low quiescent current, and very linear regulator with very fast transient response. it is primarily designed for battery powered applications where battery run time is at a premium. the low quiescent current allows extended standby time while low drop out voltage enables the system to fully utilize battery power before recharge. the si91821 is a very fast regulator with bandwidth exceeding 50 khz while maintaining low quiescent current at light load conditions. with this bandwidth, the si91821 is the fastest ldo available today. the si91821 is stable with any output capacitor type from 1 f to 10.0 f. however, x5r or x7r ceramic capacitors are recommended for best output noise and transient performance. v in v in is the input supply pin. the bypass capacitor for this pin is not critical as long as the input supply has low enough source impedance. for practical circuits, a 1.0- f or larger ceramic capacitor is recommended. when the source impedance is not low enough and/or the source is several inches from the si91821, then a larger input bypass capacitor is needed. it is required that the equivalent impedance (source impedance, wire, and trace impedance in parallel with input bypass capacitor impedance) must be smaller than the input impedance of the si91821 for stable operation. when the source impedance, wire, and trace impedance are unknown, it is recommended that an input bypass capacitor be used of a value that is equal to or greater than the output capacitor. v out v out is the output voltage of the regulator. connect a bypass capacitor from v out to ground. the output capacitor can be any value from 1.0 f to 10.0 f. a ceramic capacitor with x5r or x7r dielectric type is recommended for best output noise, line transient, and load transient performance. gnd ground is the common ground connection for v in and v out . it is also the local ground connection for c noise , set, and sd . set set is not connected internally for the fixed voltage version. therefore, it can be connected to gnd optionally. for the adjustable output version, use a resistor divider r 1 and r 2 , connect r 1 from v out to set and r 2 from set to ground. r 2 should be in the 25-k to 150-k range for low power consumption, while maintaining adequate noise immunity. the formula below calculates the value of r 1 , given the desired output voltage and the r 2 value. r 1 v out v set r 2 v set (1) v set is nominally 1.215 v. shutdown (sd ) sd controls the turning on and off of the si91821. v out is guaranteed to be on when the sd pin voltage equals or is greater than 1.5 v. v out is guaranteed to be off when the sd pin voltage equals or is less than 0.4 v. during shutdown mode, the si91821 will draw less than 2- a current from the source. to automatically turn on v out whenever the input is applied, tie the sd pin to v in . error error is an open drain output that goes low when v out is less than 5% of its normal value. as with any open drain output, an external pull up resistor is needed. this function is active in shutdown. the error pin must be left opened if not used. c noise for low noise application, connect a high frequency ceramic capacitor from c noise to ground. a 0.01- f or a 0.1- f x5r or x7r is recommended.
si91821 vishay siliconix document number: 71614 s-51147?rev. e, 20-jun-05 www.vishay.com 7 ordering information standard part number lead (pb)-free part number marking voltage temperature range package si91821dh-18-t1 si91821dh-18-t1?e3 1821 1800 1.80 v si91821dh-25-t1 si91821dh-25-t1?e3 1821 2500 2.50 v si91821dh-28-t1 si91821dh-28-t1?e3 1821 2800 2.80 v SI91821DH-30-T1 SI91821DH-30-T1?e3 1821 3000 3.00 v ? 40 to 85 c msop-8 si91821dh-33-t1 si91821dh-33-t1?e3 1821 3300 3.30 v si91821dh-50-t1 si91821dh-50-t1?e3 1821 5000 5.00 v si91821dh-ad-t1 si91821dh-ad-t1?e3 1821 adj adjustable eval kit temperature range board type si91821db ? 40 to 85 c surface mount typical characteristics (internally regulated, 25 c unless noted) 0 50 100 150 200 250 0 100 200 300 400 500 dropout v oltage vs. load current i load (ma) (mv) v drop 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0123456 dropout characteristic v in (v) (v) v out r load = 16.5 v out = 2.775 v v out = 2.775 v
si91821 vishay siliconix www.vishay.com 8 document number: 71614 s-51147?rev. e, 20-jun-05 typical characteristics (internally regulated, 25 c unless noted) 0 50 100 150 200 250 01234567 no load current vs. input voltage input voltage (v) 0 30 60 90 120 150 180 ? 50 ? 25 0 25 50 75 100 125 150 dropout voltage vs. t emperature 0 300 600 900 1200 1500 ? 40 ? 20 0 20 40 60 80 100 120 140 gnd pin current vs. temperature and load junction temperature ( c) ? 0.75 ? 0.60 ? 0.45 ? 0.30 ? 0.15 0.00 0.15 0.30 0 50 100 150 200 250 300 350 normalized output voltage vs. load current output voltage (%) load current (ma) (mv) v drop i out = 0 ma i out = 300 ma i out = 10 ma i out = 200 ma v out = 2.775 v ? 1.6 ? 1.4 ? 1.2 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 ? 0.0 0.2 0.4 0.6 ? 40 ? 20 0 20 40 60 80 100 120 140 normalized v out vs. t emperature junction temperature ( c) 0 20 40 60 80 100 120 140 160 180 2.0 2.5 3.0 3.5 4.0 4.5 5.0 dropout voltage vs. v out (%) v out i out = 0 ma i out = 300 ma i out = 100 ma v out dropout voltage (mv) ( i gnd a) ( i gnd a) i out = 0 ma i out = 300 ma i out = 200 ma junction temperature ( c) 25 c 85 c ? 40 c i out = 10 ma i out = 300 ma i out = 200 ma
si91821 vishay siliconix document number: 71614 s-51147?rev. e, 20-jun-05 www.vishay.com 9 typical waveforms load t ransient response-1 load transient response-2 v out = 2.775 v c out = 2.2 f i load = 150 to 1 ma t fall = 2 sec i load 100 ma/div v out 10 mv/div load t ransient response-3 v out = 2.775 v c out = 1.0 f i load = 1 to 150 ma t rise = 2 sec load t ransient response-4 v out = 2.775 v c out = 1.0 f i load = 150 to 1 ma t fall = 2 sec 5.00 s/div linetransient response-1 v instep = 4.77 to 5.77 v v out = 2.775 v c out = 2.2 f c in = 2.2 f i load = 300 ma t rise = 5 sec 20 s/div linetransient respons-2 v instep = 5.77 to 4.77 v v out = 2.775 v c out = 2.2 f c in = 2.2 f i load = 300 ma t fall = 5 sec 5.00 s/div 5.00 s/div 20 s/div i load 100 ma/div v out 10 mv/div v out = 2.775 v c out = 2.2 f i load = 1 to 150 ma t rise = 2 sec 5.00 s/div i load 100 ma/div v out 10 mv/div i load 100 ma/div v out 10 mv/div v out 10 mv/div v in 2 v/div v out 2 v/div v out 10 mv/div
si91821 vishay siliconix www.vishay.com 10 document number: 71614 s-51147?rev. e, 20-jun-05 typical waveforms v in = 4 v v out = 2.775 v c noise = 0.033 f i load = 300 ma turn-on sequence 100 s/div 20 s/div output noise v in = 3.80 v v out = 2.775 v i out = 300 ma c noise = 0.033 f bw = 10 hz to 1 mhz noise spectrum v in = 3.80 v v out = 2.775 v/10 ma c noise = 0.033 f 10 hz v in = 4 v v out = 2.775 v c noise = 0.033 f i load = 300 ma turn-off sequence v in ch-3 2 v/div v out ch-1 2 v/div error ch-2 2 v/div 10 ms/div v hz
1 mhz 20.0 0.01 v in 2 v/div v out 2 v/div error 2 v/div 200 v/div vishay siliconix maintains worldw ide manufacturing c apability. pr oducts may be manufactured at on e of several qualified locati ons. reliability data for silicon technology and package reliability repr esent a composite of all qualified locations. for re lated documents such as package/tape drawings, par t marking, and reliability data, see http://www.vishay.com/ppg?71614 .
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.

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